招人：SoC Physical Design Engineer

SoC Physical Design Engineer （ San Jose， CA)

This individual will contribute from RTL to GDS on block level designs. Specific tasks will include but not limiting the following:

-          design floor planning,

-          place and route,

-          CTS, timing analysis

-          physical design verification.

Job Requirements: -MSEE or MSCS w/ 3+ yrs experience of digital physical design. -Experience with RTL 2 GDSII concepts and flows. -Requires good programming/scripting skills in Perl, TCL or Python. -STA experience -Experience with industry standard toolsets from Cadence or Synopsys. -Experience of physical verification. -Excellent communication skills, both written and verbal. -Ability to work in a team environment

 

所有跟帖： 

• 回複：招人：SoC Physical Design Engineer -上山下鄉- ♂ (132 bytes) () 07/12/2013 postreply 21:01:35

• 回複：回複：招人：SoC Physical Design Engineer -azurelan- ♂ (77 bytes) () 07/12/2013 postreply 21:18:14